Field of the Invention
Embodiments of the present invention generally relate to methods of manufacturing thin film transistor devices. More particularly, embodiments of the present invention relate to a group III-V based material utilized in thin film transistor devices.
Description of the Related Art
Plasma display panels and liquid crystal displays are frequently used for flat panel displays. Liquid crystal displays (LCD) generally contain two glass substrates joined together with a layer of a liquid crystal material sandwiched there between. The glass substrate may be a semiconductor substrate, or may be a transparent substrate such as a glass, quartz, sapphire, or a clear plastic film. The LCD may also contain light emitting diodes for back lighting.
As the resolution requirements for liquid crystal displays increase, it has become desirable to control a large number of separate areas of the liquid crystal cell, called pixels. In a modern display panel, more than 1,000,000 pixels may be present. At least the same number of transistors is formed on the glass substrate so that each pixel can be switched between an energized and de-energized state relative to the other pixels disposed on the substrate.
In recent years, low temperature polysilicon (LTPS) TFT and micro-crystalline silicon TFT have been developed to offer an operation speed with a fast speed. TFT devices typically include MOS devices built with a source region, semiconductor (e.g., or called a channel region), and drain region formed on an optically transparent substrate with or without an optional dielectric layer disposed thereon. Subsequently, a gate dielectric layer is then deposited on top of the source region, semiconductor region (e.g., or called a channel region) and drain region isolate a gate electrode from the semiconductor (e.g., or called a channel region), source and drain regions. The gate electrode is formed on top of the gate dielectric layer. The performance of a TFT device dependent on the quality of the films that are deposited to form the MOS structure. The key performance elements of a MOS device are the qualities of the semiconductor layer (e.g., or called a channel layer), the gate dielectric layer, and the semiconductor layer (e.g., or called a channel layer) and gate dielectric layer interface. The quality of the semiconductor layer (e.g., or called a channel region) has received a lot of attention in recent years.
Therefore, there is a need for forming a semiconductor layer with improved film qualities to provide a stable and reliable device performance.